๐ Getting start
May 1, 2024ยทยท
2 min read
ZHENG YANG | ๆจ้ฎ
Table of Content
Folder Structure
.
โโโ docs //documents for ZIGGO
โโโ figs //figures for docs
โโโ hardware //hareware code, for PL part(pkt_gen, time sync in FPGA)
โโโ readme.md //readme for whole project
โโโ software //software code, for ps part(pkt_gen, time sync)
โโโ testbed-build //code for building testbed
Introduction to git branches
Branch Name | Basic Function | Packet Resize | Online Analyze | Offline Analyze |
---|---|---|---|---|
main | โ | โ | ||
packet_resize | โ | โ | โ | |
offline_analyze | โ | โ |
The branches of TSNPerf submitted this time can be divided into three categories. But the main branch is inconvenient to use in two ways. In order to solve the above two limitations, we have also submitted two patch branches.
- The
main
branch contains basic time synchronization and pkt_gen functions, as well as online analysis functions. However, its limitation is that it can only send Ethernet of MTU (1500B) size, and due to the limited performance of the zynq development board, online analysis may cause packet loss. packet_resize
branch can send Ethernet frames of any size (64B-1500B).offline_analyse
branch can forward the data packets to the PC for offline analysis to avoid packet loss.
Note1: When switch to ‘packet_resize’ branch, you also need to modify the
software/config/flow.json
{ "job_id": 0, "flow_id": 0, "src": 1, "dst": 2, "period": 2048, "MD": 1024, "packet_size": 750 // add this attribute },
Note2: When switch to ‘offline_anaylze’ branch, you need to link device to anthor PC (linux) by wire in ETH1.
Building and Starting the TSNPerf
Set up the FPGA board and initialize PS system
Compile software code, run the time synchronizationย &ย pktย _gen_app