📈 TSNPerf 设计原理
TSNPerf 使用网卡硬件时间戳功能达到纳秒级抖动
May 1, 2024
🔨 System Design —— PL & PS Co-operate
Docs to enable CaaS Switches' time synchronization logic and set up TSN GCL (gate control list), switch forwarding rules (including to dual-DMA).
May 1, 2024
💪 Hardware:FPGA bitstream & Petalinux system rootfs for TSN Evaluation Toolkit
Hardware:FPGA bitstream & Petalinux system rootfs for TSN Evaluation Toolkit
May 1, 2024
💦 Software:Time Sync + Config for CaaS Switches
Docs to enable CaaS Switches' time synchronization logic and set up TSN GCL (gate control list), switch forwarding rules (including to dual-DMA).
May 1, 2024
📈 TSNPerf 使用指南
TSNPerf 硬件准备 系统准备 和 测试程序使用
May 1, 2024
🔨 System Design —— PL & PS Co-operate
ZIGGO is implemented on ZYNQ-7000 SoC and exploits ZYNQ's both hardware and software programmability.
May 1, 2024
💦 Software:Time Sync + Config for CaaS Device
Docs to enable CaaS Device' time synchronization logic and set up pkt gen.
May 1, 2024
📕 ZIGGO Device使用手册
Docs to enable CaaS Switches' time synchronization logic and set up TSN GCL (gate control list), switch forwarding rules (including to dual-DMA).
May 1, 2024
💦 互联互通测试TestBed搭建流程
Docs to enable CaaS Switches' time synchronization logic and set up TSN GCL (gate control list), switch forwarding rules (including to dual-DMA).
May 1, 2024
☀ 某品牌交换机报告
TSNPerf 使用网卡硬件时间戳功能达到纳秒级抖动
May 1, 2024